As the IP Lead for both hard and soft IP, you will oversee the development of RapidSilicon’s FPGA IP portfolio. Your global teams will be using open and close-source components to develop an IP portfolio spanning GPIO, Serdes, DSP, RAM, ML accelerators, and chiplets. You will be responsible for selecting the best components, through rigorous evaluation, to base your development on. You will select and implement a rigorous verification process that is simulation-based, formal ferification-based, and hardware testing-based. You will build an R&D team that is customer and quality obsessed and will provide the best-in-class and wide-application IP content.