Sr. Manager, Physical Design

Sr. Manager, Physical Design Location Los Gatos, CA Position Type Full Time Job Description The Sr. Manager, Physical Design is the engineering leader who leads all aspects of physical design from RTL to GDSII. Experience leading multiple chips to tapeout from RTL to...

Sr. Director, SoC Architecture

Sr. Director, SoC Architecture Location Los Gatos, CA Position Type Full Time Job Description The SoC Architect is the engineering leader who spearheads architecture of FPGA SoC and reports to VP of Silicon Engineering. Architect RapidSilicon’s FPGA SoC architecture...

Principal IP Verification Engineer

Principal IP Verification Engineer Location San Jose, California Position Type Full Time Job Description The Principal IP Verification Engineer will set the technical direction for design verification actions Responsible for FPGA design verification at the IP and...

Principal IP P&R Engineer

Principal IP P&R Engineer Location San Jose, California Position Type Full Time Job Description The Principal IP Design and Frontend Engineer will set the technical direction for the global IP P&R team Responsible for RTL to GDS implementation and signoff at...

Principal IP Design and Frontend Engineer

Principal IP Design and Frontend Engineer Location San Jose, California Position Type Full Time Job Description The Principal IP Design and Frontend Engineer will set the technical direction for the global IP RTL Design team Responsible for FPGA RTL development at the...

Director, IP Verification

Director, IP Verification Location San Jose, California Position Type Full Time Job Description The IP Verification Director will manage the global IP DV team Responsible for FPGA design verification at the IP and subsystem levels of hierarchy Ensure that the chip...