SoC Design Lead
Location
Position Type
Job Description
- Responsible for FPGA SoC implementation from micro-architecture to netlist including timing closure
- Requires hands-on experience with RTL implementation
- Prefer to have experience with creating SoC using internal and external IP
- Define and Build flow for Synthesis, Timing Analysis, CDC and LINT
- Build automation scripts to automate EDA tools operations
Minimum Qualifications
- M.S. + 10 years in SoC Design and implementation
- 5+ years of hands-on experience with RTL design and IP integration
- 5+ years of experience with Synthesis and STA
Preferred Skills
- Experience with RTL integration, LINT and CDC
- Experience with project management is plus