Sr. Manager, ASIC Validation
Location
Los Gatos, CA
Position Type
Full Time
Job Description
The Sr. Manager, ASIC Validation is responsible for spearheading pre- and post-silicon validation activities for our FPGA SoCs.
- Prior experience leading pre-silicon and post-silicon validation activities required
- Pre-silicon validation experience with FPGA or Hardware (Veloce or Palladium) is required
- Experience porting ASIC RTL to FPGA/Emulation RTL is required
- Experience with Xilinx and/or Altera FPGA development flow is a plus
- Experience with bare metal embedded software driver development is a plus
- Experience with python scripting and automation platform is a big plus
Minimum Qualifications
- M.S. + 10 years in pre- or post-silicon validation
- 3+ years experience as a validation lead
Preferred Skills
- Experience managing cross-functional team
- Experience with project management
Deadline to Apply
Rolling
Drop us an email, with attached resume, to careers@rapidsilicon.com
*We’re an equal opportunity employer. All applicants will be considered for employment without attention to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status