Sr. Manager, Physical Design
Location
Position Type
Job Description
- Experience leading multiple chips to tapeout from RTL to GDSII
- Good to have hands-on experience with synthesis and STA
- Work with SoC design team to work with boundaries and parameters to meet product’s PPA requirement
- Experience with low power physical design implementation is preferrable
- Work with internal IP and external vendors to create SoC top-level including floor plan, block implementation and top-level timing closure
- Define and build tapeout sign-off checklist and work with internal/external team to fulfill all criteria
- Hands-on experience with synthesis and STA is a plus
- Build automation scripts to automate EDA tools operations
Minimum Qualifications
- M.S. + 10 years in physical design and implementation
- 3+ chip tapeout as a physical design lead from RTL to GDSII
- 3+ years experience as a physical design lead
Preferred Skills
- Experience managing cross-functional team is a plus
- Experience with project management is plus