At RapidSilicon, we focus on bringing creativity to FPGA design by combining open-source FPGA methodology with proprietary technologies that enable a faster design-to-silicon turnaround. Our employees work on innovative AI-enhanced EDA tools to provide the most optimized design result that satisfies the needs in general-purpose or domain-specific applications.

To view our job listings, please visit our Careers page at rapidsilicon.com/careers/   

• Build and manage a PnR team owning partitions and full-chip from synthesis to place and route through all sign-off including timing signoff, physical verification, EMIR signoff, and formal verification.
• Influence tools, flows, and overall design methodology in design construction, signoff, and optimization.
• Work closely with architecture/RTL/DV/silicon validation teams to build the right product from landing zone to validation.
• Plan schedule, headcount, and computing resources. And keep all plans in sync with other teams.
• Make engineering judgment on tradeoff among PPA.

• 15+ years of experience in Physical Design.
• Great communication and teamwork to contribute to diverse and inclusive teams.
• Proven track record of implementing designs through synthesis, Floorplanning, place and route, extraction, timing, and physical verification.
• Understanding of constraints generation, STA, timing optimization, and timing closure.
• Experience in EDA tools such as Primetime, StarRC, Genus, Innovus, Design Compiler, ICC/ICC2.
• Proficient understanding of CTS and different clock building techniques
• Experience with multi-clock, multi-power-domain design
• Experience in IP integration (memories, IO’s, embedded processors, double data rate, networking fabrics, and Analog IP)
• Knowledge of semiconductor device physics and transistor characteristics
• Scripting skills in Python, Tcl, or Perl
• Ability to collaborate and work directly with the tool vendors, and drive them to resolve tools bugs, as well as implement the required improvements
• Outstanding technical problem solving and debugging ability