Raptor Design Suite: A Call to Arms

By Alain Dargelas, Ph.D., Vice President of Software Engineering

In my previous blogs, I introduced the Raptor Design Suite, a comprehensive open-source SDK for FPGA compilation. Raptor Design Suite comes with a multitude of features to streamline FPGA development, including GUIs, Power Estimation, Tcl interface, SDC support, Advanced VSCode text editor integration, IP catalog and generation, Simulation models, Simulators integration, Waveform viewing, SystemVerilog and VHDL Synthesis, Partitioning, Packing, Place & Route, Timing and Power Analysis, Placement viewer, Critical path timing annotation on placement viewer, Device Modeling, Bitstream generation, Configuration, On-chip debugging capabilities, and LLM built-in assistant.

While this is an impressive array of functionalities, our journey doesn’t end here. Through our engagements with customers, we have identified several additional features that are essential to making Raptor Design Suite a fully comprehensive solution.

Must-have features include:

  • RTL structural netlist viewer
  • Gate-level netlist viewer
  • Critical path netlist viewer annotation
  • Pin assignment viewer
  • Waveform viewer cross-probing with Source code and Schematic views
  • RTL, SDC, and Pin constraints Linter(s)
  • CDC analysis
  • Formal verification (RTL vs gate, post-synth gate vs post-pnr gate)
  • Power heat map

We are actively seeking help in developing and/or integrating existing open-source components into the Raptor Design Suite to fulfill these needs. Additionally, we welcome any other suggestions for features that would enhance the suite’s capabilities.

We have already integrated significant contributions from QuickLogic in FOEDAG (The GUI framework) and are eager to expand our list of contributors. Let’s work together to make the open-source Raptor Design Suite a valuable alternative to existing commercially available solutions.

Please feel free to contact me directly with any questions about how or what to collaborate on at alain@rapidsilicon.com