IP P&R Principal
Location
Penang, Malaysia
Position Type
Full Time
About Us
At RapidSilicon, we focus on bringing creativity to FPGA design by combining open-source FPGA methodology with proprietary technologies that enable a faster design-to-silicon turnaround. Our employees work on innovative AI-enhanced EDA tools to provide the most optimized design result that satisfies the needs in general-purpose or domain-specific applications.
To view our job listings, please visit our Careers page at rapidsilicon.com/careers/
Job Description
The IP Design and Frontend Principal will set the technical direction for the global IP P&R team
- Responsible for RTL to GDS implementation and signoff at the IP/SS level
- Deliver timing and power models to SW team for customers
- Establish high quality delivery culture across global IP team
Minimum Qualifications
- B.S. in EE/CE/CS (M.S. preferred)
- 12 years in chip development, 6 of those years P&R
- 3 years using a scripting language, such as Tcl or Python
- Experience coordinating projects and developing talent between local and remote teams
- Understands contemporary manufacturing design rules
Preferred Skills
- Developed an FPGA product; used an FPGA product
- Understanding of packaging co-design and DFX flows
- Have setup IR/EM, LVS/DRC, DFM, and reliability checks
Deadline to Apply
Rolling
Drop us an email, with attached resume, to careers@rapidsilicon.com
*We’re an equal opportunity employer. All applicants will be considered for employment without attention to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status