At RapidSilicon, we focus on bringing creativity to FPGA design by combining open-source FPGA methodology with proprietary technologies that enable a faster design-to-silicon turnaround. Our employees work on innovative AI-enhanced EDA tools to provide the most optimized design result that satisfies the needs in general-purpose or domain-specific applications.

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• The SoC Validation Engineer is responsible for emulating SoC RTL code using an FPGA prototyping platform. Tasks include RTL partitioning, synthesis and simulation using the Vivado tool chain.
• Validation will include running the embedded software stack starting from ROM BIOS.
• Works with counterparts in US and worldwide engineering teams.
• Owns FPGA prototyping platform delivery

• B.S. + 5 years in RTL design/verification
• Experience with Verilog, Vivado, Xilinx FPGA tools 
• Embedded software experience is a plus

• You will be part of highly qualified and professional team.
• Working with international customers from U.S., China, and/or South Korea.
• Market Competitive Salary package and incentives based on performance.
• Clearly defined career growth path and technical roadmap for personal growth.