At RapidSilicon, we focus on bringing creativity to FPGA design by combining open-source FPGA methodology with proprietary technologies that enable a faster design-to-silicon turnaround. Our employees work on innovative AI-enhanced EDA tools to provide the most optimized design result that satisfies the needs in general-purpose or domain-specific applications.

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• Build, manage, lead and mentor a team of ASIC verification engineers
• Drive methodology and strategy for the verification of next generation SOCs.
• Drive the test bench architecture, test plan and test bench development for module, subsystem and fullchip verification.
• Build and continuously reform verification infrastructure and methodologies to meet the demands of next generation SoCs
• Develop and maintain methodology, flows, and sign-off criteria for verification team.
• Work with architects, RTL designers, FPGA, emulation engineers to ensure that verification requirements are met.

• B.S or M.S with EE/CE with at least 15+ years of verification experience.
• 7+ years of experience in managing verification teams along with program management experience.
• Experience with multiple successful ASIC tape outs. Track record of first-pass success
• Experience building teams including hiring, scheduling and budgeting
• Proficient in UVM/OVM verification methodologies and deep understanding of SoC verification concepts.
• Experience with verification of SoCs with embedded processors or CPU verification.
• Experience with complete verification cycle from design conception to tape-out of complex SoCs.

• You will be part of highly qualified and professional team.
• Working with international customers from U.S., China, and/or South Korea.
• Market Competitive Salary package and incentives based on performance.
• Clearly defined career growth path and technical roadmap for personal growth.