Sr. Staff, Physical Design Engineer
At RapidSilicon, we focus on bringing creativity to FPGA design by combining open-source FPGA methodology with proprietary technologies that enable a faster design-to-silicon turnaround. Our employees work on innovative AI-enhanced EDA tools to provide the most optimized design result that satisfies the needs in general-purpose or domain-specific applications.
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- Provide technical leadership for all aspects of synthesis and physical design of SoC designs.
- Implement the blocks and work with the micro-architects to ensure the blocks meet the project’s area, power, and performance goals
- Provide feedback to the RTL team to resolve timing, power, area, DFT, CDC issues, etc.
- Work with top-level owners to address any power, timing, area, PV, LEC, ESD issues.
- Bachelor’s degree in electrical engineering, computer engineering or computer science
- 8+ years of SoC tapeout and/or physical design flow development experience
- Self-driven individual with a can-do attitude, and an ability to work in a dynamic group environment with remote time zones
- Excellent scripting skills (csh/bash, Perl, Python TCL, Makefile etc.)
- In-depth knowledge of industry-standard EDA tools, understanding their capabilities and underlying algorithms