Unlocking Design Potential with Vega eFPGA IP
AMPLIFY YOUR SILICON WITH REPROGRAMMABLE LOGIC!
Explore how integrating re-programmable eFPGA IP into your ASIC or SoC can add flexibility, product differentiation, and lower development costs while reducing design risks. Discover how Vega eFPGA IP, seamlessly integrated with standard cell libraries, empowers you to create infinitely adaptable IC designs. Our expert team will demonstrate the industry-leading Raptor Design Suite, an open-source toolchain, enabling you to maximize the power of parallel processing and software acceleration.
Session One
6/29 @ 07:00 AM PDT
Session Two
6/29 @ 10:00 AM PDT
SPEAKERS

Jayson Bethurem
VP, Business Development

Alain Dargelas, Ph.D.
VP, EDA Software

Brian Philofsky
Senior Architect